Accelerating the pace of engineering and science

• 평가판
• 제품 업데이트

# Three-Level Bridge

Implement three-level neutral point clamped (NPC) power converter with selectable topologies and power switching devices

## Library

Power Electronics

## Description

The Three-Level Bridge block implements a three-level power converter that consists of one, two, or three arms of power switching devices. Each arm consists of four switching devices along with their antiparallel diodes and two neutral clamping diodes as shown in the figure below.

The type of power switching device (IGBT, GTO, MOSFET, or ideal switch) and the number of arms (one, two, or three) are selectable from the dialog box. When the ideal switch is used as the switching device, the Three-Level Bridge block implements an ideal switch bridge having a three-level topology as shown in the following figure.

## Dialog Box and Parameters

Number of bridge arms

Determine the bridge topology: one, two, or three arms.

Snubber resistance Rs

The snubber resistance, in ohms (Ω). Set the Snubber resistance Rs parameter to inf to eliminate the snubbers from the model.

Snubber capacitance Cs

The snubber capacitance, in farads (F). Set the Snubber capacitance Cs parameter to 0 to eliminate the snubbers, or to inf to get a resistive snubber.

For forced-commutated devices (GTO, IGBT, or MOSFET) the Three-Level Bridge block operates satisfactorily with resistive snubbers as long as the firing pulses are sent to the switching devices.

If the firing pulses to forced-commutated devices are blocked, the bridge operates as a diode rectifier. In this condition, you must use appropriate values of Rs and Cs. If the model is discretized, you can use the following formulas to compute approximate values of Rs and Cs:

where

Pn = nominal power of single- or three-phase converter (VA)
Vn = nominal line-to-line AC voltage (Vrms)
f = fundamental frequency (Hz)
Ts = sample time (s)

These Rs and Cs values are derived from the following two criteria:

• The snubber leakage current at fundamental frequency is less than 0.1% of nominal current when power electronic devices are not conducting.

• The RC time constant of snubbers is higher than two times the sample time Ts.

Note that the Rs and Cs values that guarantee numerical stability of the discretized bridge can be different from actual values used in the physical circuit.

Power electronic device

Select the type of power electronic device to use in the bridge.

Internal resistance Ron

Internal resistance of the selected devices and diodes, in ohms (Ω).

Forward voltages [Device Vf, Diode Vfd]

The forward voltage of the selected devices (for GTO or IGBT only) and of the antiparallel and clamping diodes, in volts.

Measurements

Select All Device currents to measure the current flowing through all the components (switching devices and diodes). If the snubber devices are defined, the measured currents are those flowing through the power electronic devices only.

Select Phase-to-neutral and DC voltages to measure the terminal voltages (AC and DC) of the Three-Level Bridge block.

Select All voltages and currents to measure all voltages and currents defined for the Three-Level Bridge block.

Place a Multimeter block in your model to display the selected measurements during the simulation. In the Available Measurement list box of the Multimeter block, the measurement is identified by a label followed by the block name.

Measurement

Label (for GTO, IGBT, MOSFET Devices)

Device currents

IQ1a,IQ2a,IQ3a,IQ4a,

IQ1b,IQ2b,IQ3b,IQ4b,

IQ1c,IQ2c,IQ3c,IQ4c,

ID1a,ID2a,ID3a,ID4a,ID5a,ID6a,

ID1b,ID2b,ID3b,ID4b,ID5b,ID6b,

ID1c,ID2c,ID3c,ID4c,ID5c,ID6c

Terminal voltages

Uan:, Ubn:, Ucn:, Udc+:, Udc-:

Measurement

Label (for Ideal Switch Device)

Device currents

Isw1a,Isw2a,Isw3a,Isw1b,Isw2b,Isw3b,
Isw1c,Isw2c,Isw3c

Terminal voltages

Uan:, Ubn:, Ucn:, Udc+:, Udc-:

## Inputs and Outputs

The input g is a vectorized gating signal containing pulses to control the power electronic devices of the bridge. The length of the input vector depends on the number of arm you specified for the bridge topology.

Topology

Pulse Vector of Input g

One arm

[Q1a,Q2a,Q3a,Q4a]

Two arms

[Q1a,Q2a,Q3a,Q4a,Q1b,Q2b,Q3b,Q4b]

Three arms

[Q1a,Q2a,Q3a,Q4a,Q1b,Q2b,Q3b,Q4b,Q1c,Q2c,Q3c,Q4c]

 Note   In the case of the ideal switch converter, the Q1 pulse is sent to Sw1, the Q4 pulse to Sw2, and a logical AND operation is performed on the Q2 and Q3 pulses and the result sent to Sw3.

## Assumptions and Limitations

Turn-on and turn-off times (Fall time, Tail time) of power switching devices are not modeled in the Three-Level Bridge block.

## Example

The power_3levelVSCpower_3levelVSC example illustrates the use of the Three-Level Bridge block in an AC-DC converter consisting of a three-phase IGBT-based voltage sourced converter (VSC). The converter is pulse-width modulated (PWM) to produce a 500 V DC voltage (+/- 250 V). In this example, the converter chopping frequency is 1620 Hz and the power system frequency is 60 Hz.

The VSC is controlled in a closed loop by two PI regulators in order to maintain a DC voltage of 500 V at the load while maintaining a unity input power factor for the AC supply.

The initial conditions for a steady-state simulation are generated by running an initial simulation to steady state for an integer number of cycles of 60 Hz. The final states (both SimPowerSystems™ and Simulink® controller states) are saved in a vector called xInitial. This vector, as well as the sample times (Ts_Power and Ts_Control) are saved in the power_3levelVSC_xinit.mat file.

When you open this model, the initial condition vector xInitial and the sample times saved in the MAT file are automatically loaded in the workspace. Start the simulation. The monitored signals start in steady state.

Observe the following signals:

• The DC voltage (Vdc Scope block)

• The primary voltage and current of phase A of the AC supply (VaIa Scope block)

• The device currents of leg A of the IGBT bridge (Ia_Devices Scope block inside the Measurements & Signals subsystem)

• The line-to-line terminal voltage of the VSC (Vab_VSC Scope block)

At 50 ms, a 200 kW load is switched in. You can see that the dynamic response of the DC regulator to the sudden load variation from 200 kW to 400 kW is satisfactory. The DC voltage reverts to 500 V within 2 cycles and the unity power factor on the AC side is maintained.

At 100 ms, a stop-pulsing signal is activated and the pulses normally sent to the converter are blocked. You can see that the DC voltage drops to 315 V. A drastic change in the primary current waveform can also be observed. When the pulses are blocked, the Three-Level Bridge block operation becomes similar to a three-phase diode bridge.

The following two figures summarize the results of the simulation. The first figure shows the operation of the AC-DC converter during the load variation and when the pulses are blocked.

The second figure shows the current flowing in the various devices of the IGBT bridge when the converter is feeding 500 Vdc to a 200-kW load.